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5.3  Frequency ErrorWord-p. 166
5.3A  Frequency Error for DC-HSUPA
5.3B  Frequency Error for OLTDUp
5.3C  Frequency Error for UL CLTD Activation state 1
5.3D  Frequency Error for UL CLTD Activation state 2 and 3
5.4  Output Power Dynamics in the Uplink
5.4.1  Open Loop Power Control in the Uplink
5.4.1A  Open Loop Power Control in the Uplink for DC-HSUPA
5.4.2  Inner Loop Power Control in the Uplink
5.4.2A  Inner Loop Power Control in the Uplink for DC-HSUPAWord-p. 184
5.4.2B  Inner Loop Power Control in the Uplink for OLTDWord-p. 190
5.4.2C  Inner Loop Power Control in the Uplink for UL CLTD activation state 1Word-p. 197
5.4.2D  Inner Loop Power Control in the Uplink for UL CLTD activation state 2 and 3Word-p. 205
5.4.3  Minimum Output PowerWord-p. 213
5.4.3A  Minimum Output Power for DC-HSUPA
5.4.3B  Minimum Output Power for OLTD
5.4.3C  Minimum Output Power for UL CLTD Activation state 1
5.4.3D  Minimum Output Power for UL CLTD Activation state 2 and 3
5.4.4  Out-of-synchronisation handling of output power
5.4.4A  Out-of-synchronization handling of output power for a UE which supports type1 for DCH
5.4.4B  Out-of-synchronisation handling of output power for OLTD
5.4.4C  Out-of-synchronisation handling of output power for UL CLTD activation state 1
5.4.4D  Out-of-synchronisation handling of output power for UL CLTD activation state 2 and 3
5.4.5  Out of quality handling of TPI for UL CLTD activation state 1
5.5  Transmit ON/OFF Power
5.6  Change of TFCWord-p. 244
5.6AA  Change of TFC for OLTDWord-p. 247
5.6ABVoid
5.6ACVoid
5.7  Power setting in uplink compressed mode
5.7A  HS-DPCCH power controlWord-p. 261
5.7BA  HS-DPCCH power control for UL OLTDWord-p. 265
5.7BB  HS-DPCCH power control for UL CLTD activation state 1Word-p. 269
5.7BC  HS-DPCCH power control for UL CLTD activation state 2 and 3Word-p. 274
5.8  Occupied Bandwidth (OBW)Word-p. 278
5.8A  Occupied Bandwidth (OBW) for DC-HSUPA
5.8B  Occupied Bandwidth (OBW) for OLTD
5.8C  Occupied Bandwidth (OBW) for UL CLTD Activation state 1

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