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15  Uplink throughput enhancements with low standard impact
15.1  MS multislot capability switching
15.2  Type 2 MS Implementation
15.2.1  Concept Description
15.2.2Void
15.2.2a  Interference FrequenciesPDF-p. 442
15.2.3Void
15.2.3a  Transmitter Output Power Levels
15.2.4Void
15.2.4a  Analysis Assumptions
15.2.5  Duplexer and Receive Filter RequirementsPDF-p. 449
15.2.6Void
15.2.6a  Basic Type 2 Architecture
15.2.7Void
15.2.7a  Modified Type 2 ArchitecturePDF-p. 467
15.2.8Void
15.2.8a  Hybrid Type 2 ArchitecturePDF-p. 476
15.2.9  Areas for Further StudyPDF-p. 483
15.3  References
A  Plots for clause 7 (dual-carrier and multi-carrier)PDF-p. 486
B  Chapter 8 Link simulation resultsPDF-p. 488
C  Chapter 8 Link simulation resultsPDF-p. 496
D  Chapter 8 Link simulation resultsPDF-p. 508
E  Detailed simulation results for reduced transmission time interval (subclause 10.3.2)PDF-p. 511
F  Flow-graphs of SMTP and POP3 scenarios (subclause 10.3.3)PDF-p. 513
G  Change historyPDF-p. 516

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