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TR 25.937 (RAN3)
UTRAN TDD low chiprate

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(P) V4.1.0    2001/10    33 p.


Rapporteur:  Mr. Xu, Bing
See also:  –


The work item "Low chip rate TDD Iub/Iur protocol aspects" is a Building Block which has been agreed at TSG RAN#8. Its parent feature is "Low chip rate TDD" which has been agreed at TSGRAN#6 and updated at RAN#7. The purpose of the work item "Low chip rate TDD Iub/Iur protocol aspects" is to update the Iub/Iur interface protocol specifications and related overview specifications in RAN WG3 in support of the several aspects of the feature "Low chip rate TDD".

The purpose of this TR is to help the TSG RAN WG3 group to specify the changes to existing specifications, needed for the introduction of the low chip rate TDD option in the UTRAN for Rel.4.


 

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